Difference between revisions of "cpp/atomic/atomic signal fence"
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| − | Establishes memory synchronization ordering of non-atomic and relaxed atomic accesses, as instructed by {{tt|order}}, between a thread and a signal handler executed on the same thread. This is equivalent to {{ | + | Establishes memory synchronization ordering of non-atomic and relaxed atomic accesses, as instructed by {{tt|order}}, between a thread and a signal handler executed on the same thread. This is equivalent to {{c|std::atomic_thread_fence}}, except no CPU instructions for memory ordering are issued. Only reordering of the instructions by the compiler is suppressed as {{tt|order}} instructs, e.g. writes cannot be moved past {{c|std::atomic_signal_fence(std::memory_order_release)}} and reads cannot be moved ahead of {{c|std::atomic_signal_fence(std::memory_order::acquire)}}. |
===Parameters=== | ===Parameters=== | ||
Revision as of 18:47, 19 April 2012
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<td><atomic>
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<td ><td class="t-dcl-nopad"> </td> <td > (since C++11) </td> </tr> Template:ddcl list end
Establishes memory synchronization ordering of non-atomic and relaxed atomic accesses, as instructed by order, between a thread and a signal handler executed on the same thread. This is equivalent to std::atomic_thread_fence, except no CPU instructions for memory ordering are issued. Only reordering of the instructions by the compiler is suppressed as order instructs, e.g. writes cannot be moved past std::atomic_signal_fence(std::memory_order_release) and reads cannot be moved ahead of std::atomic_signal_fence(std::memory_order::acquire).
Contents |
Parameters
| order | - | the memory ordering executed by this fence |
Return value
(none)
